Publication · Conference Paper

A minimal hardware implementation of a high speed ERT system and a demonstration of its capabilities

ISPT6 paper on a further-simplified UCT current pulse ERT system. The primary ERT functions are compressed onto two double-sided circuit boards, with sub-1 mV noise under lab conditions, demonstrated on a 290 mm bubble column for minerals-flotation applications.

Authors
E. W. Randall, K. H. Hauslaib, O. Adetunji
Publication / Event
6th International Symposium on Process Tomography (ISPT6), Cape Town, South Africa, 26 to 28 March 2012
Date
Related work
Builds directly on Randall et al. (2010), WCIPT6

Summary

This paper describes a further refinement of the UCT current pulse ERT instrument. The primary ERT functions are compressed onto two double-sided circuit boards: a 16-channel amplifier with sample-and-hold, and a current source plus multiplexer board. Both are driven by a Freescale GB60 micro-controller, a commercial USB DAQ, and an Intel Atom embedded PC for real-time reconstruction. Acquisition runs at 850 frames/second from a single 16-electrode ring, or at a proportionally reduced rate across up to four rings. Noise drops to below 1 mV standard deviation under lab conditions, and the system is demonstrated on a 290 mm bubble column, using ERT together with an optical capillary probe to characterise gas distribution and bubble size for minerals-flotation applications.

Context

This paper sits in the middle of a multi-year involvement with Bill Randall's current pulse ERT programme at UCT, and was presented at a symposium hosted in Cape Town itself. It is where the hardware simplification really started to bite. Two circuit boards instead of a rack of modules, with the noise floor pushed down enough that the system could be trusted on a live bubble column. The broader engineering pattern it set up is one I still return to: keep the architecture legible, make the interfaces explicit, and make the system usable in the real world rather than only in theory.

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